1. Technical Field
The present invention relates to an apparatus and method for providing inter-processor communication (IPC) between processors and systems in a communication system and, more particularly, to an apparatus and method for providing inter-processor communication using transmission control protocol/Internet protocol (TCP/IP).
2. Related Art
An exemplary communication system uses an RS-422 or asynchronous transfer mode (ATM) method for inter-processor communication (IPC). The reason why the RS-422 or asynchronous transfer mode (ATM) method is used is because they are verified and stable methods. RS-422 is an Electronics Industry Association (EIA) serial line standard.
For example, a code division multiple access (CDMA) second generation (2G) system performs message communications between processors and systems using a RS-422 method based on communication inter networking (CIN), and a third generation (3G) system performs cell communication using an asynchronous transfer mode (ATM) switch and a multiplexer/demultiplexer (MUX/DEMUX). Further, a physical medium such as E1/T1 or an optical fiber is used between a base station controller (BSC) and a base station transceiver system (BTS). Message communication between processors or boards uses a bus structure. This method can be used in a system having a backboard structure and can be readily implemented. Further, the method enables relatively faster communication and its control operation is simple.
However, as described above, the exemplary communication inter networking (CIN) (2G) or asynchronous transfer mode (ATM) (3G) methods need separate control boards for the interprocessor communication (IPC). The second generation (2G) system needs high speed interconnect processor assembly (HIPA) and high capacity IPC node assembly (HINA) boards for interprocessor communication (IPC) control, and the third generation (3G) system should include asynchronous transfer mode (ATM) switch boards being ATM Switch and Fabric Board Assembly (ASFA) boards, and ATM Cell MUX/DEMUX Assembly (ACMA) boards for a multiplexer/demultiplexer (MUX/DEMUX) added to each of the predetermined number of processor boards. In these structures, flexibility and expandability of the system are degraded, and there are difficulties at the time of performing an interface with an external device. Because these high-priced boards are needed, a product price is increased, thereby degrading market competitiveness. Where a partial bus structure is used, a design of a backboard is complicated and many signals should be routed.
On the other hand, an exemplary communication method between high-speed processors or systems is configured using the bus structure or asynchronous transfer mode (ATM) method. Where the bus structure is used, because the number of signal lines between two communication nodes is increased, a design of hardware (H/W) is complicated, a system is weakened by external noise, and the probability of error occurrence is higher. Moreover, when communication between buses is performed, a board and a processor and device for separate bus control are needed because an arbiter for occupying a corresponding bus is needed. When the asynchronous transfer mode (ATM) method is used, a high-priced asynchronous transfer mode (ATM) switch and a high-priced multiplexer/demultiplexer (MUX/DEMUX) device are needed. A period of time needed for development becomes relatively longer. Also, the exemplary method is not appropriate for a compact communication system.